MC68HC912DG128 Datasheet, PDF (411/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Appendix: CGM Practical Aspects
Practical Aspects For The PLL Usage
feature even in manual bandwidth control, offering then to the
application software the same flexibility for the clocking control as the
automatic mode.
20.4.3 Filter Components Selection Guide
20.4.3.1 Equations Set
These equations can be used to select a set of filter components. Two
cases are considered:
1. The ‘tracking’ mode. This situation is reached normally when the
PLL operates in automatic bandwidth selection mode (AUTO=1 in
the PLLCR register).
2. The ‘acquisition’ mode. This situation is reached when the PLL
operates in manual bandwidth selection mode and forced
acquisition (AUTO=0, ACQ=0 in the PLLCR register).
In both equations, the power supply should be 5V. Start with the target
loop bandwidth as a function of the other parameters, but obviously,
nothing prevents the user from starting with the capacitor value for
example. Also, remember that the smoothing capacitor is always
assumed to be one tenth of the series capacitance value.
So with:
m:
R:
C:
F_bus:
ζ:
F_c:
the multiplying factor for the reference frequency (i.e. (synr+1))
the series resistance of the low pass filter in Ω
the series capacitance of the low pass filter in nF
the target bus frequency expressed in MHz
the desired damping factor
the desired loop bandwidth expressed in Hz
for the ‘tracking’ mode:
F_c = ^2---_π--^â‹---_â‹^1---R0---9--_â‹--^â‹-C--^ζ---²- = ^{3---7---.--7---8-----â‹}--2e---^-_â‹-^1--^--^-_π^.--^--^6--^-1--^7--^-_â‹^0--^5--^-.--m^-7-^-–-^--9-^--^-F-5-^--^---^b--^-u-^---^-s-^----^â‹---R--
MC68HC912DG128 — Rev 3.0
MOTOROLA
Appendix: CGM Practical Aspects
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Technical Data
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