MC68HC912DG128 Datasheet, PDF (366/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
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18.4.5 BDM Registers
Seven BDM registers are mapped into the standard 64-Kbyte address
space when BDM is active. Mapping is shown in Table 18-4.
Table 18-4. BDM registers
Address
$FF00
$FF01
$FF02 – $FF03
$FF04 – $FF05
$FF06
Register
BDM Instruction Register
BDM Status Register
BDM Shift Register
BDM Address Register
BDM CCR Holding Register
• The INSTRUCTION register content is determined by the type of
background command being executed.
• The STATUS register indicates BDM operating conditions.
• The SHIFT register contains data being received or transmitted
via the serial interface.
• The ADDRESS register is temporary storage for BDM commands.
• The CCRSAV register preserves the content of the CPU12 CCR
while BDM is active.
The only registers of interest to users are the STATUS register and the
CCRSAV register. The other BDM registers are only used by the BDM
firmware to execute commands. The registers are accessed by means
of the hardware READ_BD and WRITE_BD commands, but should not
be written during BDM operation (except the CCRSAV register which
could be written to modify the CCR value).
Technical Data
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MC68HC912DG128 — Rev 3.0
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