MC68HC912DG128 Datasheet, PDF (353/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
MSCAN Controller
17.13.15 msCAN12 Port CAN Control Register (PCTLCAN)
Bit 7
6
5
4
3
2
1
Bit 0
PCTLCAN R
0
0
0
0
0
0
PUPCAN RDPCAN
$013D W
RESET
0
0
0
0
0
0
0
0
The following bits control pins 7 through 2 of Port CAN when they are
implemented externally.
PUPCAN — Pull-Up Enable Port CAN
0 = Pull mode disabled for Port CAN.
1 = Pull mode enabled for Port CAN.
RDPCAN — Reduced Drive Port CAN
0 = Reduced drive disabled for Port CAN.
1 = Reduced drive enabled for Port CAN.
17.13.16 msCAN12 Port CAN Data Register (PORTCAN)
PORTCAN R
$013E W
RESET
Bit 7
PCAN7
-
6
PCAN6
5
PCAN5
4
PCAN4
3
PCAN3
2
PCAN2
1
TxCAN
Bit 0
RxCAN
-
-
-
-
Port bits 7 to 2 will read zero when configured as inputs because they
are not implemented externally.
When configured as output, port bits 7 to 2 will read the last value
written.
Reading bits 1 and 0 returns the value of the TxCan and RxCan pins,
respectively.
17.13.17 msCAN12 Port CAN Data Direction Register (DDRCAN)
Bit 7
6
5
4
3
2
1
DDRCAN R
0
DDCAN7
DDCAN6
DDCAN5
DDCAN4
DDCAN3
DDCAN2
$013F W
RESET
0
0
0
0
0
0
0
Bit 0
0
0
DDCAN7 – DDCAN2 — This bits served as memory locations since
there are no corresponding external port pins.
Technical Data
353
MC68HC912DG128 — Rev 3.0
MSCAN Controller
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