MC68HC912DG128 Datasheet, PDF (401/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Electrical Specifications
Tables of Data
Table 19-14. Multiplexed Expansion Bus Timing
V_DD = 5.0 Vdc ± 10%, V_SS = 0 Vdc, T_A = T_L to T_H, unless otherwise noted
Num
Characteristic^{(1), (2), (3), (4)}
Frequency of operation (E-clock frequency)
1 Cycle timet_cyc = 1/f_o
2 Pulse width, E lowPW_EL = t_cyc/2 + delay
3 Pulse width, E high⁽⁵⁾PW_EH = t_cyc/2 + delay
5 Address delay timet_AD = t_cyc/4 + delay
7 Address valid time to ECLK riset_AV = PW_EL − t_AD
8 Multiplexed address hold timet_MAH = t_cyc/4 + delay
9 Address Hold to Data Valid
10 Data Hold to High Zt_DHZ = t_AD − 20
11 Read data setup time
12 Read data hold time
13 Write data delay time
14 Write data hold time
15 Write data setup time⁽⁵⁾t_DSW = PW_EH − t_DDW
16 Read/write delay timet_RWD = t_cyc/4 + delay
17 Read/write valid time to E riset_RWV = PW_EL − t_RWD
18 Read/write hold time
19 Low strobe⁽⁶⁾ delay timet_LSD = t_cyc/4 + delay
20 Low strobe⁽⁶⁾ valid time to E riset_LSV = PW_EL − t_LSD
21 _{Low strobe}⁽⁶⁾ _{hold time}
22 Address access time⁽⁵⁾t_ACCA = t_cyc − t_AD − t_DSR
23 Access time from E rise⁽⁵⁾t_ACCE = PW_EH − t_DSR
24 DBE delay from ECLK rise⁽⁵⁾t_DBED = t_cyc/4 + delay
25 DBE valid timet_DBE = PW_EH − t_DBED
26 DBE hold time from ECLK fall
Delay
—
−4
Symbol
f_o
t_cyc
PW_EL
8 MHz
Min Max
0.004 8.0
0.125 250
58
−2
PW_EH
60
27
t_AD
58
—
t_AV
0
−18
t_MAH
13
—
t_AHDS
20
—
t_DHZ
38
—
t_DSR
25
—
t_DHR
10
—
t_DDW
47
—
t_DHW
20
—
t_DSW
13
18
t_RWD
49
—
t_RWV
9
—
t_RWH
20
18
t_LSD
49
—
t_LSV
9
—
t_LSH
20
—
t_ACCA
42
—
t_ACCE
35
8
t_DBED
39
—
t_DBE
21
t_DBEH
–3
10
1. All timings are calculated for normal port drives.
2. Crystal input is required to be within 45% to 55% duty.
Unit
MHz
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MC68HC912DG128 — Rev 3.0
MOTOROLA
Electrical Specifications
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Technical Data
401