MC68HC912DG128 Datasheet, PDF (82/452 Pages) Motorola, Inc – Microcontrollers

Operating Modes
Freescale Semiconductor, Inc.
unintended operations, a write to one of these registers should be
followed with a NOP instruction.
If conflicts occur when mapping resources, the register block will take
precedence over the other resources; RAM or EEPROM addresses
occupied by the register block will not be available for storage. When
active, BDM ROM takes precedence over other resources, although a
conflict between BDM ROM and register space is not possible. The
following table shows resource mapping precedence.
The MC68HC912DG128 contains 128K bytes of Flash EEPROM
nonvolatile memory which can be used to store program code or static
data. This physical memory comprises four 32k byte array modules,
00FEE32K, 01FEE32K, 10FEE32K and 11FEE32K. The 32K byte array
11FEE32K has a fixed location from $4000 to $7FFF and $C000 to
$FFFF. The three 32K byte arrays 00FEE32K, 01FEE32K and
10FEE32K are accessible through a 16K byte program page window
mapped from $8000 to $BFFF. The fixed 32K byte array 11FEE32K can
also be accessed through the program page window..
Table 5-2. Mapping Precedence
Precedence
1
2
3
4
5
6
Resource
BDM ROM (if active)
Register Space
RAM
EEPROM
On-Chip Flash EEPROM
External Memory
5.5.1 Register Block Mapping
After reset the 1K byte register block resides at location $0000 but can
be reassigned to any 2K byte boundary within the standard 64K byte
address space. Mapping of internal registers is controlled by five bits in
the INITRG register. The register block occupies the first 1K byte bytes
of the 2K byte block.
Technical Data
82
MC68HC912DG128 — Rev 3.0
Operating Modes
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