MC68HC912DG128 Datasheet, PDF (117/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Flash Memory
Operation
The programming software is responsible for all timing during a program
sequence. This includes the total number of program pulses (n_PP), the
length of the program pulse (t_PPULSE), the program margin pulses (p_m)
and the delay between turning off the high voltage and verifying the
operation (t_VPROG).
The erase software is responsible for all timing during an erase
sequence. This includes the total number of erase pulses (e_m), the
length of the erase pulse (t_EPULSE), the erase margin pulse or pulses,
and the delay between turning off the high voltage and verifying the
operation (t_VERASE).
Software also controls the supply of the proper program/erase voltage to
the V_FP pin, and should be at the proper level before ENPE is set during
a program/erase sequence.
A program/erase cycle should not be in progress when starting another
program/erase, or while attempting to read from the array.
NOTE:
Although clearing ENPE disables the program/erase voltage (V_FP) from
the V_FP pin to the array, care must be taken to ensure that V_FP is at V_DD
whenever programming/erasing is not in progress. Not doing so could
damage the part. Ensuring that V_FP is always greater or equal to V_DD
can be accomplished by controlling the V_FP power supply with the
programming software via an output pin. Alternatively, all programming
and erasing can be done prior to installing the device on an application
circuit board which can always connect V_FP to V_DD. Programming can
also be accomplished by plugging the board into a special programming
fixture which provides program/erase voltage to the V_FP pin.
MC68HC912DG128 — Rev 3.0
MOTOROLA
Flash Memory
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Go to: www.freescale.com
Technical Data
117