MC68HC912DG128 Datasheet, PDF (225/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Enhanced Capture Timer
Timer Registers
0 = Counter reset inhibited and counter free runs
1 = Counter reset by a successful output compare 7
If TC7 = $0000 and TCRE = 1, TCNT will stay at $0000 continuously.
If TC7 = $FFFF and TCRE = 1, TOF will never be set when TCNT is
reset from $FFFF to $0000.
PR2, PR1, PR0 — Timer Prescaler Select
These three bits specify the number of ÷2 stages that are to be
inserted between the module clock and the main timer counter.
Table 13-3. Prescaler Selection
PR2
PR1
PR0
Prescale
Factor
0
0
0
1
0
0
1
2
0
1
0
4
0
1
1
8
1
0
0
16
1
0
1
32
1
1
0
64
1
1
1
128
The newly selected prescale factor will not take effect until the next
synchronized edge where all prescale counter stages equal zero.
MC68HC912DG128 — Rev 3.0
MOTOROLA
Enhanced Capture Timer
For More Information On This Product,
Go to: www.freescale.com
Technical Data
225