MC68HC912DG128 Datasheet, PDF (179/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Clock Functions
System Clock Frequency formulas
11.7 System Clock Frequency formulas
See Figure 11-6:
SLWCLK = EXTALi / ( 2 x SLOW )
SLOW = 1,2,..63
SLWCLK = EXTALi
SLOW = 0
PLLCLK = 2 x EXTALi x (SYNR + 1) / (REFDV + 1)
ECLK = SYSCLK / 2
XCLK = SLWCLK / 2
PCLK = SYSCLK / 2
BCLK⁽¹⁾ = EXTALi / 2
Boolean equations:
SYSCLK = (BCSP & PLLCLK) | (BCSP & BCSS & EXTALi) | (BCSP &
BCSS & SLWCLK)
MCLK = (PCLK & MCS) | (XCLK & MCS)
MSCAN system = (EXTALi & CLKSRC) | (SYSCLK & CLKSRC)
BDM system = (BCLK & CLKSW) | (ECLK & CLKSW)
NOTE: During limp-home mode PCLK, ECLK, BCLK, MCLK and XCLK are
supplied by VCO (PLLCLK).
1. If SYSCLK is slower than EXTALi (BCSS=1, BCSP=0, SLOW>0), BCLK becomes ECLK.
MC68HC912DG128 — Rev 3.0
MOTOROLA
Clock Functions
For More Information On This Product,
Go to: www.freescale.com
Technical Data
179