MC68HC912DG128 Datasheet, PDF (390/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Electrical Specifications
Table 19-6. Analog Converter Characteristics (Operating)
V_DD = 5.0 Vdc ±10%, V_SS = 0 Vdc, T_A = T_L to T_H, ATD Clock = 2 MHz, unless otherwise noted
Characteristic
Symbol
Min Typical Max
8-bit resolution⁽¹⁾
1 count
20
8-bit differential non-linearity⁽²⁾
DNL
−0.5
+0.5
8-bit integral non-linearity⁽²⁾
INL
−1
+1
8-bit absolute error^,(3)2, 4, 8, and 16 ATD sample clocks
AE
−1
+1
Unit
mV
count
count
count
10-bit resolution⁽¹⁾
1 count
5
10-bit differential non-linearity⁽²⁾
DNL
–2
10-bit integral non-linearity⁽²⁾
INL
–2
10-bit absolute error⁽³⁾ 2, 4, 8, and 16 ATD sample clocks
AE
–2.5
mV
2
count
2
count
2.5 count
Maximum source impedance
R_S
See
20
note⁽⁴⁾
KΩ
1. V_RH − V_RL ≥ 5.12V; V_DDA − V_SSA = 5.12V
2. At V_REF = 5.12V, one 8-bit count = 20 mV, and one 10-bit count = 5mV.
INL and DNL are characterized using the process window parameters affecting the ATD accuracy, but they are not tested.
3. These values include quantization error which is inherently 1/2 count for any A/D converter.
4. Maximum source impedance is application-dependent. Error resulting from pin leakage depends on junction leakage into
the pin and on leakage due to charge-sharing with internal capacitance.
Error from junction leakage is a function of external source impedance and input leakage current. Expected error in result
value due to junction leakage is expressed in voltage (V_ERRJ):
V_ERRJ = R_S × I_OFF
where I_OFF is a function of operating temperature. Charge-sharing effects with internal capacitors are a function of ATD clock
speed, the number of channels being scanned, and source impedance. Charge pump leakage is computed as follows:
V_ERRJ = .25pF × V_DDA × R_S × ATDCLK/(8 × number of channels)
Technical Data
390
MC68HC912DG128 — Rev 3.0
Electrical Specifications
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