EP2A15 Datasheet, PDF (90/99 Pages) Altera Corporation – Programmable Logic Device Family

APEX II Programmable Logic Device Family Data Sheet
Table 63. EP2A40 Minimum Pulse Width Timing Parameters
Symbol
-7 Speed Grade
-8 Speed Grade
t_CH
t_CL
t_CLRP
t_PREP
t_ESBCH
t_ESBCL
t_ESBWP
t_ESBRP
Min
Max
Min
Max
0.89
0.89
0.12
0.12
0.89
0.89
1.05
0.78
1.33
1.33
0.14
0.14
1.33
1.33
1.20
0.90
Table 64. EP2A70 f_MAX LE Timing Parameters
Symbol
-7 Speed Grade
Min
Max
t_SU
0.30
t_H
0.30
t_CO
0.22
t_LUT
0.66
-8 Speed Grade
Min
Max
0.34
0.34
0.25
0.76
-9 Speed Grade
Unit
Min
Max
1.88
ns
1.88
ns
0.16
ns
0.16
ns
1.88
ns
1.88
ns
1.38
ns
1.03
ns
-9 Speed Grade
Unit
Min
Max
0.39
ns
0.39
ns
0.29
ns
0.87
ns
90
Altera Corporation