EP2A15 Datasheet, PDF (89/99 Pages) Altera Corporation – Programmable Logic Device Family

APEX II Programmable Logic Device Family Data Sheet
Table 61. EP2A40 f_MAX ESB Timing Parameters
Symbol
-7 Speed Grade
-8 Speed Grade
t_ESBARC
t_ESBSRC
t_ESBAWC
t_ESBSWC
t_ESBWASU
t_ESBWAH
t_ESBWDSU
t_ESBWDH
t_ESBRASU
t_ESBRAH
t_ESBWESU
t_ESBDATASU
t_ESBWADDRSU
t_ESBRADDRSU
t_ESBDATACO1
t_ESBDATACO2
t_ESBDD
t_PD
t_PTERMSU
t_PTERMCO
Min
Max
Min
Max
2.28
2.62
2.23
2.56
3.13
3.60
2.76
3.18
1.19
1.37
0.00
0.00
1.44
1.66
0.00
0.00
1.88
2.17
0.00
0.00
1.60
1.85
0.74
0.85
0.82
0.94
0.73
0.84
1.09
1.25
1.73
1.99
3.26
3.75
1.55
1.78
0.99
1.13
0.79
0.90
Table 62. EP2A40 f_MAX Routing Delays
Symbol
-7 Speed Grade
t_F1-4
t_F5-20
t_F20+
Min
Max
0.17
1.12
1.49
-8 Speed Grade
Min
Max
0.19
1.28
1.72
-9 Speed Grade
Unit
Min
Max
3.01
ns
2.95
ns
4.13
ns
3.65
ns
1.57
ns
0.00
ns
1.91
ns
0.00
ns
2.49
ns
0.00
ns
2.12
ns
0.98
ns
1.08
ns
.97
ns
1.44
ns
2.29
ns
4.32
ns
2.05
ns
1.30
ns
1.04
ns
-9 Speed Grade
Unit
Min
Max
0.22
ns
1.48
ns
1.98
ns
Altera Corporation
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