EP2A15 Datasheet, PDF (28/99 Pages) Altera Corporation – Programmable Logic Device Family

APEX II Programmable Logic Device Family Data Sheet
Figure 16. APEX II Parallel Expanders
From
Previous
Macrocell
Product-
Term
Select
Matrix
Parallel Expander
Switch
Macrocell
Product-
Term Logic
Product-
Term
Select
Matrix
Parallel Expander
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Macrocell
Product-
Term Logic
32 Signals from
Local Interconnect
Embedded
System Block
To Next
Macrocell
The ESB can implement various types of memory blocks, including Dual-
Port+ RAM (bidirectional dual-port RAM), dual- and single-port RAM,
ROM, FIFO, and CAM blocks.
The ESB includes input and output registers; the input registers
synchronize writes, and the output registers can pipeline designs to
improve system performance. The ESB offers a bidirectional, dual-port
mode, which supports any combination of two port operations: two reads,
two writes, or one read and one write at two different clock frequencies.
Figure 17 shows the ESB block diagram.
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Altera Corporation