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| EP2A15 Datasheet, PDF (71/99 Pages) Altera Corporation – Programmable Logic Device Family | |||
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APEX II Programmable Logic Device Family Data Sheet
Table 31. SSTL-2 Class I Specifications
Symbol
VCCIO
VTT
VREF
VIH
VIL
VOH
VOL
Parameter
Output supply voltage
Termination voltage
Reference voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Conditions Minimum
2.375
VREF â 0.04
1.15
VREF + 0.18
â0.3
IOH = â7.6 mA
(10)
VTT + 0.57
IOL = 7.6 mA (10)
Typical
2.5
VREF
1.25
Maximum
2.625
VREF + 0.04
1.35
3.0
VREF â 0.18
VTT â 0.57
Units
V
V
V
V
V
V
V
Table 32. SSTL-2 Class II Specifications
Symbol
VCCIO
VTT
VREF
VIH
VIL
VOH
VOL
Parameter
Output supply voltage
Termination voltage
Reference voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Conditions
IOH = â15.2 mA
(10)
IOL = 15.2 mA
(10)
Minimum
2.3
VREF â 0.04
1.15
VREF + 0.18
â0.3
VTT + 0.76
Typical
2.5
VREF
1.25
Maximum
2.7
VREF + 0.04
1.35
VCCIO + 0.3
VREF â 0.18
VTT â 0.76
Units
V
V
V
V
V
V
V
Table 33. SSTL-3 Class I Specifications
Symbol
VCCIO
VTT
VREF
VIH
VIL
VOH
VOL
Parameter
Output supply voltage
Termination voltage
Reference voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Conditions Minimum
3.0
VREF â 0.05
1.3
VREF + 0.2
â0.3
IOH = â8 mA (10) VTT + 0.6
IOL = 8 mA (10)
Typical
3.3
VREF
1.5
Maximum
3.6
VREF + 0.05
1.7
VCCIO + 0.3
VREF â 0.2
VTT â 0.6
Units
V
V
V
V
V
V
V
Altera Corporation
71
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