EP2A15 Datasheet, PDF (87/99 Pages) Altera Corporation – Programmable Logic Device Family

APEX II Programmable Logic Device Family Data Sheet
Table 57. EP2A25 f_MAX ESB Timing Parameters
Symbol
-7 Speed Grade
-8 Speed Grade
t_ESBARC
t_ESBSRC
t_ESBAWC
t_ESBSWC
t_ESBWASU
t_ESBWAH
t_ESBWDSU
t_ESBWDH
t_ESBRASU
t_ESBRAH
t_ESBWESU
t_ESBDATASU
t_ESBWADDRSU
t_ESBRADDRSU
t_ESBDATACO1
t_ESBDATACO2
t_ESBDD
t_PD
t_PTERMSU
t_PTERMCO
Min
Max
Min
Max
1.28
1.47
2.49
2.86
2.20
2.53
3.02
3.47
0.07
0.07
0.15
0.18
0.37
0.43
0.16
0.18
0.84
0.96
0.00
0.00
0.14
0.16
− 0.02
− 0.03
− 0.40
− 0.46
− 0.38
− 0.44
1.30
1.50
1.84
2.12
2.42
2.78
1.69
1.94
1.10
1.26
0.82
0.94
Table 58. EP2A25 f_MAX Routing Delays
Symbol
-7 Speed Grade
t_F1-4
t_F5-20
t_F20+
Min
Max
0.19
0.65
1.11
-8 Speed Grade
Min
Max
0.21
0.75
1.27
-9 Speed Grade
Unit
Min
0.09
0.20
0.49
0.21
1.11
0.00
0.19
− 0.03
− 0.53
− 0.51
1.45
Max
1.69
ns
3.29
ns
2.91
ns
3.99
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.72
ns
2.44
ns
3.19
ns
2.23
ns
ns
1.08
ns
-9 Speed Grade
Unit
Min
Max
0.25
ns
0.86
ns
1.46
ns
Altera Corporation
87