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EP2A15 Datasheet, PDF (59/99 Pages) Altera Corporation – Programmable Logic Device Family
APEX II Programmable Logic Device Family Data Sheet
The APEX II VCCINT pins must always be connected to a 1.5-V power
supply. With a 1.5-V VCCINT level, input pins are 1.5-V, 1.8-V, 2.5-V and
3.3-V tolerant. The VCCIO pins can be connected to either a 1.5-V, 1.8-V,
2.5-V or 3.3-V power supply, depending on the output requirements. The
output levels are compatible with systems of the same voltage as the
power supply (i.e., when VCCIO pins are connected to a 1.5-V power
supply, the output levels are compatible with 1.5-V systems). When
VCCIO pins are connected to a 3.3-V power supply, the output high is
3.3 V and is compatible with 3.3-V or 5.0-V systems.
Table 14 summarizes APEX II MultiVolt I/O support.
Table 14. APEX II MultiVolt I/O Support Note (1)
VCCIO (V)
1.5 V
Input Signal
1.8 V 2.5 V 3.3 V
5.0 V
1.5 V
Output Signal
1.8 V 2.5 V 3.3 V
5.0 V
1.5
v
v
v
v
v
1.8
v (2)
v
v
v
v (3) v
2.5
v (2) v (2)
v
v
v (4) v (4) v
3.3
v (2) v (2)
v
v v (5) v (6) v (6) v (6) v
v
Notes to Table 14:
(1) The PCI clamping diode must be disabled to drive an input with voltages higher than VCCIO, except for with a 5.0-V
input.
(2) These input levels are only allowed if the input standard is set to any VREF standard (i.e., SSTL-3, SSTL-2, HSTL,
GTL+, and AGP 2×). The VREF standard inputs are powered by VCCINT. LVTTL, PCI, PCI-X, and AGP 1× standard
inputs are powered by VCCIO. As a result, input levels below the VCCIO setting cannot drive these standards.
(3) When VCCIO = 1.8 V, an APEX II device can drive a 1.5-V device with 1.8-V tolerant inputs.
(4) When VCCIO = 2.5 V, an APEX II device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs.
(5) APEX II devices can be 5.0-V tolerant with the use of an external series resistor and enabling the PCI clamping diode.
(6) When VCCIO = 3.3 V, an APEX II device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs.
Open-drain output pins with a pull-up resistor to the 5.0-V supply and a
series register to the I/O pin can drive 5.0-V CMOS input pins that require
a VIH of 3.5 V. When the pin is inactive, the trace will be pulled up to 5.0 V
by the resistor. The open-drain pin will only drive low or tri-state; it will
never drive high. The rise time is dependent on the value of the pull-up
resistor and load impedance. The IOL current specification should be
considered when selecting a pull-up resistor.
Power
Sequencing &
Hot Socketing
Because APEX II devices can be used in a mixed-voltage environment,
they have been designed specifically for any possible power-up sequence.
Therefore, the VCCIO and VCCINT power supplies may be powered in any
order.
Altera Corporation
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