EP2A15 Datasheet, PDF (68/99 Pages) Altera Corporation – Programmable Logic Device Family

APEX II Programmable Logic Device Family Data Sheet
Table 22. APEX II Device DC Operating Conditions Note (7)
Symbol
I_I
I_OZ
I_CC0
R_CONF
Parameter
Conditions
Input pin leakage
current
V_I = V_CCIO to 0 V (8)
Tri-stated I/O pin
leakage current
V_O = V_CCIO to 0 V (8)
V_CC supply current
(standby) (All ESBs
in power-down
mode)
V_I = ground, no load,
no toggling inputs, -7
speed grade
V_I = ground, no load,
no toggling inputs, -8,
-9 speed grades
Value of I/O pin pull- V_CCIO = 3.0 V (9)
up resistor before
and during
configuration
V_CCIO = 2.375 V (9)
V_CCIO = 1.71 V (9)
Minimum
–10
–10
20
30
60
Typical Maximum Unit
10
µA
10
µA
10
mA
5
mA
50
kΩ
80
kΩ
150
kΩ
Table 23. LVTTL Specifications
Symbol
V_CCIO
V_{I H}
V_IL
I_I
V_OH
V_OL
Parameter
Output supply voltage
High-level input voltage
Low-level input voltage
Input pin leakage current
High-level output voltage
Low-level output voltage
Table 24. LVCMOS Specifications
Symbol
V_CCIO
V_IH
V_IL
I_I
V_OH
Parameter
Output supply voltage
High-level input voltage
Low-level input voltage
Input pin leakage current
High-level output voltage
V_OL
Low-level output voltage
Conditions
Minimum
V_IN = 0 V or V_CCIO
I_OH = –4 to –24 mA (10)
I_OL = 4 to 24 mA (10)
3.0
1.7
–0.5
–5
2.4
Maximum
3.6
4.1
0.8
5
0.45
Units
V
V
V
µA
V
V
Conditions
V_IN = 0 V or V_CCIO
V_CCIO = 3.0,
I_OH = –0.1 mA
V_CCIO = 3.0,
I_OL = 0.1 mA
Minimum
3.0
1.7
–0.5
–10
V_CCIO – 0.2
Maximum
3.6
4.1
0.7
10
Units
V
V
V
µA
V
0.2
V
68
Altera Corporation