EP2A15 Datasheet, PDF (58/99 Pages) Altera Corporation – Programmable Logic Device Family

APEX II Programmable Logic Device Family Data Sheet
Pre-programmed CDS may also be used to resolve clock-to-data skew
greater than 50% of the bit period. However, internal logic must be used
to implement the byte alignment circuitry for this operation.
Flexible-LVDS I/O Pins
A subset of pins in the top two I/O banks supports interfacing with
Flexible-LVDS, LVPECL, and HyperTransport inputs. These
Flexible-LVDS input pins include dedicated LVDS, LVPECL, and
HyperTransport input buffers. A subset of pins in the bottom two I/O
banks supports interfacing with Flexible-LVDS and HyperTransport
outputs. These Flexible-LVDS output pins include dedicated LVDS and
HyperTransport output buffers. The Flexible-LVDS pins do not require
any external components except for 100-Ω termination resistors on
receiver channels. These pins do not contain dedicated
serialization/deserialization circuitry; therefore, internal logic is used to
perform serialization/deserialization functions.
The EP2A15 and EP2A25 devices support 56 input and 56 output
Flexible-LVDS channels. The EP2A40 and larger devices support 88 input
and 88 output Flexible-LVDS channels. All APEX II devices support the
Flexible-LVDS interface up to 400 Mbps (DDR) per channel. Flexible-
LVDS pins along with the True-LVDS pins provide up to 144-Gbps total
device bandwidth. Table 13 shows the Flexible-LVDS timing
specification.
Table 13. APEX II Flexible-LVDS Timing Specification
Symbol Timing Parameter Definition
-7
Min Max
Data Rate Maximum operating speed
400
TCCS Transmitter channel-to-channel
700
skew
SW
Receiver sampling window
1,100
Speed Grade
-8
Min Max
311
900
1,400
-9
Min Max
311
900
1,400
Unit
Mbps
ps
ps
MultiVolt I/O
Interface
The APEX II architecture supports the MultiVolt I/O interface feature,
which allows APEX II devices in all packages to interface with systems of
different supply voltages. The devices have one set of V_CC pins for
internal operation and input buffers (VCCINT), and another set for I/O
output drivers (VCCIO).
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