HC1S25 Datasheet, PDF (78/110 Pages) Altera Corporation – HardCopy Stratix Device Family

HardCopy Series Handbook, Volume 1
1 Performance estimation is not supported for HardCopy APEX
devices in the Quartus II software. Your design can be optimized
by modifying the RTL code or the FPGA design and the
constraints. You should contact Altera to discuss any desired
performance improvements with HardCopy APEX devices.
Buffer Insertion
Beginning with version 4.2, the Quartus II software provides improved
HardCopy Stratix device timing closure and estimation, to more
accurately reflect the results expected after back-end migration. The
Quartus II software performs the necessary buffer insertion in your
HardCopy Stratix device during the Fitter process, and stores the location
of these buffers and necessary routing information in the Quartus II
Archive File. This buffer insertion improves the estimation of the
Quartus II Timing Analyzer for the HardCopy Stratix device.
Placement Constraints
Beginning with version 4.2, the Quartus II software supports placement
constraints and LogicLock regions for HardCopy Stratix devices.
Figure 5–6 shows an iterative process to modify the placement constraints
until the best placement for the HardCopy Stratix device is achieved.
5–16
Preliminary
Altera Corporation
September 2008