HC1S25 Datasheet, PDF (21/110 Pages) Altera Corporation – HardCopy Stratix Device Family

IEEE Std. 1149.1 (JTAG) Boundary-Scan Support
Table 3–3. 32-Bit HardCopy Stratix Device IDCODE
Device
HC1S25
HC1S30
HC1S40
HC1S60
HC1S80
Version
(4 Bits)
0000
0000
0000
0000
0000
IDCODE (32 Bits) (1)
Part Number
(16 Bits)
Manufacturer Identity
(11 Bits)
0010 0000 0000 0011
0010 0000 0000 0100
0010 0000 0000 0101
0010 0000 0000 0110
0010 0000 0000 0111
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
Notes to Table 3–3:
(1) The most significant bit (MSB) is on the left.
(2) The IDCODE’s least significant bit (LSB) is always 1.
LSB
(1 Bit) (2)
1
1
1
1
1
Figure 3–1 shows the timing requirements for the JTAG signals.
Figure 3–1. HardCopy Stratix JTAG Waveforms
TMS
TDI
TCK
TDO
Signal
to Be
Captured
Signal
to Be
Driven
t _JCP
t _JCH
t _JCL
t _JPSU
t_JPZX
t_JSSU
t_JPCO
t_JSH
t_JSZX
t_JSCO
t _JPH
t _JPXZ
t_JSXZ
Altera Corporation
September 2008
3–3
Preliminary