HC1S25 Datasheet, PDF (19/110 Pages) Altera Corporation – HardCopy Stratix Device Family

3. Boundary-Scan Support
H51004-3.4
IEEE Std. 1149.1
(JTAG)
Boundary-Scan
Support
All HardCopy^® Stratix^® structured ASICs provide JTAG boundry-scan
test (BST) circuitry that complies with the IEEE Std. 1149.1-1990
specification. The BST architecture offers the capability to efficiently test
components on printed circuit boards (PCBs) with tight lead spacing by
testing pin connections, without using physical test probes, and
capturing functional data while a device is in normal operation.
Boundary-scan cells in a device can force signals onto pins, or capture
data from pin or core logic signals. Forced test data is serially shifted into
the boundary-scan cells. Captured data is serially shifted out and
externally compared to expected results.
A device using the JTAG interface uses four required pins, TDI, TDO, TMS,
and TCK, and one optional pin, TRST. HardCopy Stratix devices support
the JTAG instructions as shown in Table 3–1.
Table 3–1. HardCopy Stratix JTAG Instructions (Part 1 of 2)
JTAG Instruction Instruction Code
SAMPLE/PRELOAD 00 0000 0101
EXTEST (1)
00 0000 0000
BYPASS
11 1111 1111
USERCODE
00 0000 0111
IDCODE
HIGHZ (1)
00 0000 0110
00 0000 1011
Description
Allows a snapshot of signals at the device pins to be captured and
examined during normal device operation, and permits an initial
data pattern to be output at the device pins.
Allows the external circuitry and board-level interconnects to be
tested by forcing a test pattern at the output pins and capturing test
results at the input pins.
Places the 1-bit bypass register between the TDI and TDO pins,
which allows the BST data to pass synchronously through selected
devices to adjacent devices during normal device operation.
Selects the 32-bit USERCODE register and places it between the
TDI and TDO pins, allowing the USERCODE to be serially shifted
out of TDO.
Selects the IDCODE register and places it between TDI and TDO,
allowing the IDCODE to be serially shifted out of TDO.
Places the 1-bit bypass register between the TDI and TDO pins,
which allows the BST data to pass synchronously through selected
devices to adjacent devices during normal device operation, while
tri-stating all of the I/O pins.
Altera Corporation
September 2008
3–1
Preliminary