HC1S25 Datasheet, PDF (51/110 Pages) Altera Corporation – HardCopy Stratix Device Family

Altera Corporation
September 2008
Operating Conditions
Table 4–47. HardCopy Stratix Maximum Output Clock Rate for PLL[5, 6, 11,
12] Pins (Part 2 of 2)
I/O Standard
LVDS (2)
HyperTransport
technology (2)
Performance
Unit
500
MHz
350
MHz
Table 4–48. HardCopy Stratix Maximum Output Clock Rate (Using I/O Pins)
for PLL[1, 2, 3, 4] Pins (Part 1 of 2)
I/O Standard
LVTTL
2.5 V
1.8 V
1.5 V
LVCMOS
GTL
GTL+
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
SSTL-18 class I
SSTL-18 class II
1.5-V HSTL class I
1.5-V HSTL class II
1.8-V HSTL class I
1.8-V HSTL class II
3.3-V PCI
3.3-V PCI-X 1.0
Compact PCI
AGP 1×
AGP 2×
CTT
Differential HSTL
LVPECL (2)
PCML (2)
Performance
400
400
400
350
400
200
200
167
167
150
150
150
150
250
225
250
225
250
225
400
400
400
300
225
717
420
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
4–27