HC1S25 Datasheet, PDF (76/110 Pages) Altera Corporation – HardCopy Stratix Device Family

HardCopy Series Handbook, Volume 1
HardCopy Stratix device corresponding to the specified
HARDCOPY_FPGA_PROTOTYPE FPGA. Thus, the information
necessary for the HardCopy Stratix device is available from the
earlier HARDCOPY_FPGA_PROTOTYPE device selection.
All constraints related to the design are also transferred to the new
project directory. You can modify these constraints, if necessary, in
your optimized design environment to achieve the necessary timing
closure. However, if the design is optimized at the
HARDCOPY_FPGA_PROTOTYPE device level by modifying the
RTL code or the device constraints, you must migrate the project
with the HardCopy Timing Optimization Wizard.
c If an existing project directory is selected when the HardCopy
Timing Optimization Wizard is run, the existing information is
overwritten with the new compile results.
5–14
Preliminary
Altera Corporation
September 2008