HC1S25 Datasheet, PDF (29/110 Pages) Altera Corporation – HardCopy Stratix Device Family

Operating Conditions
Table 4–9. 3.3-V LVDS I/O Specifications (Part 2 of 2)
Symbol
Parameter
Conditions
V_{I CM}
V_OD (2)
Δ V_OD
V_OCM
Δ V_OCM
R_L
Input common mode
voltage
LVDS
0.3 V < V_ID < 1.0 V
J = 1 through 10
LVDS
0.3 V < V_ID < 1.0 V
J = 1 through 10
LVDS
0.2 V < V_ID < 1.0 V
J=1
LVDS
0.1 V < V_ID < 1.0 V
J = 2 through 10
Output differential
voltage
R_L = 100 Ω
Change in V_OD between R_L = 100 Ω
high and low
Output common mode R_L = 100 Ω
voltage
Change in V_OCM between R_L = 100 Ω
high and low
Receiver differential
input resistor
Minimum
100
Typical
Maximum Unit
1,100 mV
1,600
1,800 mV
1,100
1,600 mV
1,100
1,600 mV
250
1,125
90
375
1,200
100
550
mV
50
mV
1,375 mV
50
mV
110
Ω
Altera Corporation
4–5
September 2008