HC1S25 Datasheet, PDF (69/110 Pages) Altera Corporation – HardCopy Stratix Device Family

How to Design HardCopy Stratix Devices
Migrate the Compiled Project
This step generates the Quartus II Project File (.qpf) and the other files
required for HardCopy implementation. The Quartus II software also
assigns the appropriate HardCopy Stratix device for the design
migration.
Close the Quartus FPGA Project
Because you must compile the project for a HardCopy Stratix device, you
must close the existing project which you have targeted your design to a
HARDCOPY_FPGA_PROTOTYPE device.
Open the Quartus HardCopy Project
Open the Quartus II project that you created in the “Migrate the
Compiled Project” step. The selected device is one of the devices from the
HardCopy Stratix family that was assigned during that step.
Compile for HardCopy Stratix Device
Compile the design for a HardCopy Stratix device. After successful
compilation, the Timing Analysis section of the compilation report shows
the performance of the design implemented in the HardCopy device.
How to Design
HardCopy Stratix
Devices
This section describes the process for designing for a HardCopy Stratix
device using the HARDCOPY_FPGA_PROTOTYPE as your initial
selected device. In order to use the HardCopy Timing Optimization
Wizard, you must first design with the
HARDCOPY_FPGA_PROTOTYPE in order for the design to migrate to a
HardCopy Stratix device.
To target a design to a HardCopy Stratix device in the Quartus II
software, follow these steps:
1. If you have not yet done so, create a new project or open an existing
project.
2. On the Assignments menu, click Settings. In the Category list, select
Device.
3. On the Device page, in the Family list, select Stratix. Select the
desired HARDCOPY_FPGA_PROTOTYPE device in the Available
Devices list (Figure 5–2).
Altera Corporation
September 2008
5–7
Preliminary