TLK10031 Datasheet, PDF (89/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

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TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
Table 7-65. LATENCY_COUNTER_2 Field Descriptions
Bit Field
15:12 LATENCY_MEAS_START_COMMA[3:0]
(RXG)
Type
RO/LH
Reset
Description
Latency measurement start comma location status. “1” indicates start comma
location found. If LS TX is selected as start point (1E.8040 bit 7 = 0), [3:0]
indicates status for lane3, lane2, lane1, lane0. If HS RX is selected as start point
(1E.8040 bit 7 = 1), [0] indicates status for data[9:0], [1] indicates status for
data[19:10]. [3:2] is unused.
11:8 LATENCY_MEAS_STOP_COMMA[3:0]
(RXG)
7:5 RESERVED
4 LATENCY_ MEAS_READY
(RXG)
3:0 LATENCY_MEAS_COUNT[19:16]
(RXG)
RO/LH
RO/LH
RO/LH
RO/LH
Reading this register will clear Latency stopwatch status specified in
LATENCY_COUNTER_1 & LATENCY_COUNTER_2 registers. Below
sequence of reads needs to be performed for accurate and repeat
stopwatch measurements. See Latency measurement procedure more
information.
READ 0x8041
READ 0x8042
Latency measurement stop comma location status. “1” indicates stop comma
location found. If LS RX is selected as stop point (1E.8040 bit 6 = 0), [3:0]
indicates status for lane3, lane2, lane1, lane0. If HS TX is selected as stop point
(1E.8040 bit 6 = 1), [0] indicates status for data[9:0], [1] indicates status for
data[19:10]. [3:2] is unused.
Latency measurement ready indicator
0 = Indicates latency measurement not complete.
1 = Indicates latency measurement is complete and value in latency
measurement counter (LATENCY_MEAS_COUNT[19:0]) is ready to be read.
Bits[19:16] of 20 bit wide latency measurement counter. Latency measurement
counter value represents the latency in number of clock cycles. Each clock cycle
is half of the period of the measurement clock as determined by register
1E.8040 bits 5:4 and 1E.8040 bit 0. This counter will return 20’h00000 if it’s read
before rx comma is received. If latency is more than 20’hFFFFF clock cycles
then this counter returns 20’hFFFFF.
7.5.2.45 LATENCY_COUNTER_1 (register = 0x8042) (default = 0x0000) (device address: 0x1E)
Figure 7-85. LATENCY_COUNTER_1 Register
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
LATENCY_MEAS_COUNT[15:0]
(RXG)
COR ⁽¹⁾
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
(1) Latency measurement counter value resets to 20’h00000 when this register is read. Start and Stop Comma (1E.8041 bits 15:12 &
1E.8041 bits 11:8) and count valid (1E.8041 bit 4) bits are also cleared when this register is read
Table 7-66. LATENCY_COUNTER_1 Field Descriptions
Bit Field
15:0 LATENCY_MEAS_COUNT[15:0]
(RXG)
Type Reset
COR
Description
Bits[15:0] of 20 bit wide latency measurement counter. Below sequence of reads needs to
be performed for accurate and repeat stopwatch measurements.
READ 0x8041
READ 0x8042
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