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TLK10031 Datasheet, PDF (41/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver
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TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
In high speed side SERDES full rate mode, the latency measurement function runs off of an internal clock
which is equal to the frequency of the transmit serial bit rate divided by 8. In half rate mode, the latency
measurement function runs off of an internal clock which is equal to the serial bit rate divided by 4. In
quarter rate mode, the latency measurement function runs off of an internal clock which is equal to the
serial bit rate divided by 2. In eighth rate mode, the latency measurement function runs off of a clock
which is equal to the serial bit rate.
The latency measurement does not include the low speed side transmit SERDES contribution as well as
part of the channel synchronization block. The latency introduced by those two is up to (18 + 10) x N high
speed side unit intervals (UIs), where N = 2, 4 is the multiplex factor. The latency measurement also
doesn’t account for the low speed side receive SERDES contribution which is estimated to be up to 20 x N
high speed side UIs.
The latency measurement accuracy in all cases is equal to plus or minus one latency measurement clock
period. The measurement clock can be divided down if a longer duration measurement is required, in
which case the accuracy of the measurement is accordingly reduced. The high speed latency
measurement clock is divided by either 1, 2, 4, or 8 via register settings. The high speed latency
measurement clock may only be used when operating at one of the serial rates specified in the
CPRI/OBSAI specifications. It is also possible to run the latency measurement function off of the
recovered byte clock (giving a latency measurement clock frequency equal to the serial bit rate divided by
20).
The accuracy for the standard based CPRI/OBSAI application rates is shown in Table 7-10, and assumes
the latency measurement clock is not divided down per user selection (division is required to measure a
duration greater than 682 µs). For each division of 2 in the measurement clock, the accuracy is also
reduced by a factor of two.
Table 7-10. CPRI/OBSAI Latency Measurement Function Accuracy (Undivided
Measurement Clock)
LINE RATE
(Gbps)
1.2288
1.536
2.4576
3.072
3.84
4.9152
6.144
7.68
9.8304
RATE
Eighth
Quarter
Quarter
Half
Half
Half
Full
Full
Full
LATENCY CLOCK
FREQUENCY
(GHz)
1.2288
0.768
1.2288
0.768
0.96
1.2288
0.768
0.96
1.2288
ACCURACY
(± ns)
0.8138
1.302
0.8138
1.302
1.0417
0.8138
1.302
1.0417
0.8138
Copyright © 2015, Texas Instruments Incorporated
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