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TLK10031 Datasheet, PDF (13/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver
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TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
5.8 Electrical Characteristics: Low Speed Side Serial Receiver
VID
VID(pp)
CI
JTOL
JDR
tskew
tlane-skew
PARAMETER
Receiver input differential voltage, |INP – INN|
Receiver input differential peak-to-peak voltage swing
2×|INP – INN|
Receiver input capacitance
Jitter tolerance, total jitter at serial input (DJ + RJ)
(BER 10-15)
Serial input deterministic jitter (BER 10-15)
Intra-pair input skew
Lane-to-lane input skew
TEST CONDITIONS
Full Rate, AC Coupled
Half/Quarter Rate, AC Coupled
Full Rate, AC Coupled
Half/Quarter Rate, AC Coupled
Zero crossing, Half/Quarter Rate
Zero crossing, Full Rate
Zero crossing, Half/Quarter Rate
Zero crossing, Full Rate
MIN NOM MAX UNIT
50
600
mV
50
800
100
1200
100
1600 mVdfpp
2 pF
0.66
0.65 UIp-p
0.50
0.35 UIp-p
0.23 UI
30 UI
5.9 Electrical Characteristics: LVCMOS (VDDO):
PARAMETER
TEST CONDITIONS
VOH
High-level output voltage
VOL
Low-level output voltage
IOH = 2 mA, Driver Enabled (1.8V)
IOH = 2 mA, Driver Enabled (1.5V)
IOL = –2 mA, Driver Enabled (1.8V)
IOL = –2 mA, Driver Enabled (1.5V)
VIH
High-level input voltage
VIL
IIH, IIL
IOZ
CIN
Low-level input voltage
Receiver only
Driver only
Driver/Receiver With Pullup/Pulldown
Input capacitance
Low/High Input Current
Driver Disabled
Driver disabled With Pull Up/Down
Enabled
MIN
VDDO –
0.45
0.75 ×
VDDO
0
NOM
0
0.65 ×
VDDO
–0.3
MAX UNIT
VDDO
V
VDDO
0.45
0.25 × V
VDDO
VDDO +
0.3
V
0.35 ×
VDDO
V
±170 µA
±25
µA
±195
3 pF
5.10 Electrical Characteristics: Clocks
PARAMETER
Reference Clock (REFCLK0P/N, REFCLK1P/N)
F
Frequency
FHSoffset Accuracy
DC
Duty cycle
VID
Differential input voltage
CIN
Input capacitance
RIN
Differential input impedance
tRISE
Rise/fall time
Differential Output Clock (CLKOUTA/N)
F
Output frequency
VOD
Differential output voltage
tRISE
Output rise time
RTERM Output termination
TEST CONDITIONS
Relative to Nominal HS Serial Data Rate
Relative to Incoming HS Serial Data Rate
High Time
MIN
122.88
–100
–200
45%
250
10% to 90%
50
Peak to peak
10% to 90%, 2pF lumped capacitive load, AC-
Coupled
CLKOUTAP/N × P/N to DVDD
0
1000
NOM
50%
100
50
MAX UNIT
425
100
200
55%
2000
1
350
MHz
ppm
mVpp
pF
Ω
ps
500 MHz
2000 mVdfpp
350 ps
Ω
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Specifications
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