TLK10031 Datasheet, PDF (46/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
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MDC
MDIO
0011
PA[4:0]
DA[4:0]
Z
0 D15 D0
1
> 32 "1's"
Preamble
Start
Read
Code
PHY
Addr
Dev
Addr
Turn
Around
Data
Idle
Figure 7-21. CL45 - Management Interface Extended Space Read Timing
MDC
MDIO
0010
PA[4:0]
DA[4:0]
Z
0 D15 D0
1
> 32 "1's"
Preamble
Start
Read Inc
Code
PHY
Addr
Dev
Addr
Turn
Around
Data
Idle
Figure 7-22. CL45 - Management Interface Extended Space Read And Increment Timing
MDC
MDIO
0
1
1
0
PA[4:0]
RA4 RA0 Z
0 D15 D0 ¹
> 32 "1's"
Preamble
Start
Read
Code
PHY
Addr
REG
Addr
Turn
Around
Data
Idle
Figure 7-23. CL22 - Management Interface Read Timing
MDC
MDIO
0
1
0
1
PA[4:0]
RA4 RA0 1
0 D15 D0 ¹
> 32 "1's"
Preamble
Start
Write
Code
PHY
Addr
REG
Addr
Turn
Around
Data
Idle
Figure 7-24. CL22 - Management Interface Write Timing
The IEEE 802.3 Clause 22/45 specification defines many of the registers, and additional registers have
been implemented for expanded functionality.
7.4.19 Clause 22 Indirect Addressing
Due to Clause 22 register space limitations, an indirect addressing method is implemented so that the
extended register space can be accessed through Clause 22. All the device specific control and status
registers that cannot be accessed through Clause 22 direct addressing can be accessed through this
indirect addressing method. To access this register space, an address control register (Reg 30, 5’h1E)
should be written with the register address followed by a read/write transaction to address content register
(Reg 31, 5’h1F) to access the contents of the address specified in address control register. Following
timing diagrams illustrate an example write transaction to Register 16’h9000 using indirect addressing in
Clause 22.
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Detailed Description
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