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TLK10031 Datasheet, PDF (69/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver
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TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
7.5.2.12 LOOPBACK_TP_CONTROL (register: 0x000B) (default: 0x0D10) (device address: 0x1E)
Figure 7-52. LOOPBACK_TP_CONTROL Register
15
14
RESERVED
R/W
13
HS_TP_GEN_
EN
(RXG)
R/W
12
HS_TP_
VERIFY_EN
(RXG)
R/W
11
LS_TEST_PAT
T
_SEL[2]
(RXG)
R/W
10
9
8
HS_TEST_PATT
_SEL[2:0]
(RXG)
R/W
7
6
5
4
LS_TP_GEN
_EN
(RXG)
LS_TP_VERIF
Y
_EN
(RXG)
LS_TEST_PATT_SEL[1:0]
(RXG)
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
DEEP_
REMOTE_LPB
K
(RXG)
R/W
2
1
RESERVED
R/W
0
SHALLOW_
LOCAL_
LPBK
(RXG)
R/W
Bit
15:14
13
Field
RESERVED
HS_TP_GEN_EN
(RXG)
12 HS_TP_VERIFY_EN
(RXG)
11 LS_TEST_PATT_SEL[2]
(RXG)
10:8 HS_TEST_PATT_SEL[2:0]
(RXG)
7 LS_TP_GEN_EN
(RXG)
6 LS_TP_VERIFY_EN
(RXG)
5:4 LS_TEST_PATT_SEL[1:0]
(RXG)
Table 7-33. LOOPBACK_TP_CONTROL Field Description
Type
R/W
R/W
R/W
R/W
Reset
0
1
0
1
0
Description
For TI use only. (Default 2'b00)
Normal operation (Default 1’b0)
Activates test pattern generation selected by bits 1E.000B bits 10:8
Normal operation (Default 1’b0)
Activates test pattern verification selected by bits 1E.000B bits 10:8
See selection in 1E.000B bits 5:4
R/W
Test Pattern Selection. Refer to TLK100031 Bringup Procedure (a separate document)
for more information.
H/L/M/CRPAT valid in 1GKX/10G modes
000 High Frequency Test Pattern
001 Low Frequency Test Pattern
010 Mixed Frequency Test Pattern
011 CRPAT Long
100 CRPAT Short
PRBS pattern valid in 1GKX/10G/10GKR modes
101 27 - 1 PRBS pattern (Default 3’b101)
110 223 - 1 PRBS pattern
111 231 - 1 PRBS pattern
Errors can be checked by reading HS_ERROR_COUNT register. For KR standard
pattern generation and verification, please refer to Register 03.002A
R/W
0 = Normal operation (Default 1’b0)
1 = Activates test pattern generation selected by bits {1E.000B bit 11, 1E.000B bits 5:4}
on the LS side
R/W
0 = Normal operation (Default 1’b0)
1 = Activates test pattern verification selected by bits {1E.000B bit 11, 1E.000B bits 5:4}
on the LS side
R/W
LS Test Pattern Selection LS_TEST_PATT_SEL[2:0]. LS_TEST_PATT_SEL[2] is
1E.000B bit 11
000 High Frequency Test Pattern
001 Low Frequency Test Pattern
010 Mixed Frequency Test Pattern
011 CRPAT Long (In 1GKX mode only)
100 CRPAT Short (In 1GKX mode only)
101 27 - 1 PRBS pattern (Default 3’b101)
110 223 - 1 PRBS pattern
111 231 - 1 PRBS pattern
For XAUI standard test pattern generation and verification in KR mode, please refer
register 01.8002 and 01.8003
Copyright © 2015, Texas Instruments Incorporated
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