TLK10031 Datasheet, PDF (42/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
www.ti.com
7.4.16 Power Down Mode
The TLK10031 can be put in power down either through device input pins or through MDIO control
register 1E.0001.
• PDTRXA_N: Active low, power down
7.4.16.1 High Speed CML Output
The high speed data output driver is implemented using Current Mode Logic (CML) with integrated pull up
resistors. The transmit outputs must be AC coupled.
HSTXAP
HSTXAN
50 ohm transmission line
50 ohm transmission line
HSRXAP
50
50
GND
V_TERM
HSRXAN
TRANSMITTER
MEDIA
RECEIVER
Figure 7-17. Example of High Speed I/O AC Coupled Mode
Current Mode Logic (CML) drivers often require external components. The disadvantage of the external
component is a limited edge rate due to package and line parasitic. The CML driver on TLK10031 has on-
chip 50 Ω termination resistors terminated to VDDT, providing optimum performance for increased speed
requirements. The transmitter output driver is highly configurable allowing output amplitude and de-
emphasis to be tuned to the channel's individual requirements. Software programmability allows for very
flexible output amplitude control. Only AC coupled output mode is supported.
When transmitting data across long lengths of PCB trace or cable, the high frequency content of the signal
is attenuated due to dielectric losses and the skin effect of the media. This causes a “smearing” of the
data eye when viewed on an oscilloscope. The net result is reduced timing margins for the receiver and
clock recovery circuits. In order to provide equalization for the high frequency loss, 4-tap finite impulse
response (FIR) transmit de-emphasis is implemented Output swing control is via MDIO.
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