TLK10031 Datasheet, PDF (82/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
www.ti.com
Table 7-50. DATA_SWITCH_STATUS Field Descriptions (continued)
Bit Field
8 DST_OFF
(RXG)
7:4 DSR_EN[3:0]
(RXG)
3 DSR_SW_PENDING
(RXG)
2 DSR_SW_DONE
(RXG)
1 DSR_ON
(RXG)
0 DSR_OFF
(RXG)
Type
RO
RO
RO
RO
RO
RO
Reset
Description
OFF condition indicator from transmit data switch. When HIGH, indicates an OFF condition has
occurred in transmit data switch.
Source input data selection status on receive side.
0001 = LS data
0010 = HS data
0100 = Reserved
1000 = Reserved
When HIGH, indicates data switching event is pending to be completed in the receive side
based on selected data source input
When HIGH, indicates data switching event has occurred in the receive side based on selected
data source input
ON condition indicator from receive data switch. When HIGH, indicates an ON condition has
occurred in receive data switch.
OFF condition indicator from receive data switch. When HIGH, indicates an OFF condition has
occurred in receive data switch.
7.5.2.30 LS_CH_CONTROL_1 (register =0x001C) (default =0x0000) (device address: 0x1E)
15
14
7
RESERVED
6
RESERVED
Figure 7-70. LS_CH_CONTROL_1 Register
13
12
11
10
RESERVED
RW
5
4
3
2
RESERVED
RW
RW
RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
9
8
1
0
LS_CH_SYNC_HYS_SEL[1:0]
(RG)
RW
Table 7-51. LS_CH_CONTROL_1 Field Descriptions
Bit Field
15:7 RESERVED
6
RESERVED
5:2 RESERVED
1:0 LS_CH_SYNC_HYS_SEL[1:0]
(RG)
Type
RW
RW
RW
RW
Reset
Description
For TI use only. Always reads 0.
For TI use only. (Default 1'b0)
For TI use only. (Default 4'b0000)
LS Channel synchronization hysteresis selection for selected lane. Lane can be selected in
LS_SERDES_CONTROL_1.
00 = The channel synchronization, when in the synchronization state, performs the Ethernet
standard specified hysteresis to return to the LOS state (Default 2’b00)
01 = A single 8b/10b invalid decode error or disparity error causes the channel
synchronization state machine to immediately transition from sync to LOS
10 = Two adjacent 8b/10b invalid decode errors or disparity errors cause the channel
synchronization state machine to immediately transition from sync to LOS
11 = Three adjacent 8b/10b invalid decode errors or disparity errors cause the channel
synchronization state machine to immediately transition from sync to LOS
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Detailed Description
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