TLK10031 Datasheet, PDF (117/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

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TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
7.5.4.6 PCS_TP_SEED_A0 (register = 0x0022) (default = 0x0000) (device address: 0x03)
Figure 7-139. PCS_TP_SEED_A0 Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PCS_TP_SEED_A[15:0]
(R)
RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
15:0 PCS_TP_SEED_A[15:0]
(R)
Table 7-121. PCS_TP_SEED_A0 Field Descriptions
Type
RW
Reset
Description
Test pattern seed A bits 15-0
7.5.4.7 PCS_TP_SEED_A1 (register = 0x0023) (default = 0x0000) (device address: 0x03)
Figure 7-140. PCS_TP_SEED_A1 Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PCS_TP_SEED_A[31:16]
(R)
RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
15:0 PCS_TP_SEED_A[31:16]
(R)
Table 7-122. PCS_TP_SEED_A1 Field Descriptions
Type
RW
Reset
Description
Test pattern seed A bits 31-16
7.5.4.8 PCS_TP_SEED_A2 (register = 0x0024) (default = 0x0000) (device address: 0x03)
Figure 7-141. PCS_TP_SEED_A2 Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PCS_TP_SEED_A[47:32]
(R)
RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
15:0 PCS_TP_SEED_A[47:32]
(R)
Table 7-123. PCS_TP_SEED_A2 Field Descriptions
Type
RW
Reset
Description
Test pattern seed A bits 47-32
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Detailed Description 117