TLK10031 Datasheet, PDF (20/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
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7.3 Feature Description
7.3.1 10GBASE-KR Transmit Data Path Overview
In 10GBASE-KR Mode, the TLK10031 takes in XAUI data on the four low speed input lanes. The serial
data in each lane is deserialized into 10-bit parallel data, then byte aligned (channel synchronized) based
on comma detection. The four XAUI lanes are then aligned with one another, and the aligned data is input
to four 8B/10B decoders. The decoded data is then input to the transmit clock tolerance compensation
(CTC) block which compensates for any frequency offsets between the incoming XAUI data and the local
reference clock. The CTC block then delivers the data to a 64B/66B encoder and a scrambler. The
resulting scrambled 10GBASE-KR data is then input to a transmit gearbox which in turn delivers it to the
high speed side SERDES for serialization and output through the HSTXAP/N*P/N pins.
7.3.2 10GBASE-KR Receive Data Path Overview
In the receive direction, the TLK10031 takes in 64B/66B-encoded serial 10GBASE-KR data on the
HSTXAP/N*P/N pins. This data is deserialized by a high speed SERDES, then input to a receive gearbox.
After the gearbox, the data is aligned to 66-bit frames, descrambled, 64B/66B decoded, and then input to
the receive CTC block. After CTC, the data is encoded by four 8B/10B encoders, and the resulting four
10-bit parallel words are serialized by the low speed SERDES blocks. The four serial XAUI output lanes
are transmitted out the OUTAP/N*P/N pins.
7.3.3 Channel Synchronization Block
When parallel data is clocked into a parallel-to-serial converter, the byte boundary that was associated
with the parallel data is lost in the serialization of the data. When the serial data is received and converted
to parallel format again, a method is needed to be able to recognize the byte boundary again. Generally,
this is accomplished through the use of a synchronization pattern. This is a unique pattern of 1’s and 0’s
that either cannot occur as part of valid data or is a pattern that repeats at defined intervals. 8B/10B
encoding contains a character called the comma (b’0011111’ or b’1100000’) which is used by the comma
detect circuit to align the received serial data back to its original byte boundary. The TLK10031 channel
synchronization block detects the comma pattern found in the K28.5 character, generating a
synchronization signal aligning the data to their 10-bit boundaries for decoding. It is important to note that
the comma can be either a (b’0011111’) or the inverse (b’1100000’) depending on the running disparity.
The TLK10031 decoder will detect both patterns.
The TLK10031 performs channel synchronization per lane as shown in the flowchart of Figure 7-3.
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