TLK10031 Datasheet, PDF (77/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

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TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
7.5.2.23 LS_STATUS_1 (register: 0x0015) (default: 0x0000) (device address: 0x1E)
Figure 7-63. LS_STATUS_1 Register
15
14
13
RESERVED
RO
12
11
10
9
8
LS_INVALID_DECO
DE
(RXG)
LS_LOS
(RXG)
LS_LN_ALIGN_FIF LS_CH_SYNC_
O_ERR
STATUS
(RG)
(RXG)
RO/LH
RO/LH
RO/LH
RO/LL
7
6
5
4
3
2
1
0
RESERVED
LS_CHSYNC_ROT[3:0] (RXG)
RO
RO
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
15:12
11
Field
RESERVED
LS_INVALID_DECODE
(RXG)
10 LS_LOS
(RXG)
9
LS_LN_ALIGN_FIFO_ERR
(RG
8
LS_CH_SYNC_STATUS
(RXG)
7:4 RESERVED
3:0 LS_CHSYNC_ROT[3:0]
(RXG)
Table 7-44. LS_STATUS_1 Field Descriptions
Type
RO
RO/LH
RO/LH
RO/LH
RO/LH
RO
RO/LH
Reset
0
0
0
0
0
Description
For TI use only.
LS Invalid decode error for selected lane. Lane can be selected through
LS_STATUS_CFG[1:0] (Register 1E.000C). Error count for each lane can also be monitored
through respective LS_LNx_ERR_COUNT registers
Loss of Signal Indicator.
When high, indicates that a loss of signal condition is detected on LS serial receive inputs for
selected lane. Lane can be selected through LS_STATUS_CFG[1:0] (Register 1E.000C)
LS Lane alignment FIFO error status
1 = Lane alignment FIFO on LS side has error
0 = Lane alignment FIFO on LS side has no error
LS Channel sync status for selected lane. Lane can be selected through
LS_STATUS_CFG[1:0] (Register 1E.000C)
For TI use only.
Channel synchronization pointer on LS side. Required for latency measurement function.
See Latency Measurement function section for more details.
7.5.2.24 HS_STATUS_1 (register: 0x0016) (default: 0x0000) (device address: 0x1E)
Figure 7-64. HS_STATUS_1 Register
15
14
13
12
11
10
9
8
RESERVED
RO
7
6
5
4
RESERVED
HS_KR_CH_SYNC_ROT[6:4]
(RXG)
RO
RO
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
2
1
0
HS_KR_CH_SYNC_ROT[3:0]
(RXG)
RO
Bit Field
15:7 RESERVED
6:4 HS_KR_CH_SYNC_ROT[6:4]
(RXG)
3:0 HS_KR_CH_SYNC_ROT[3:0]
(RXG)
Table 7-45. HS_STATUS_1 Field Descriptions
Type
RO
RO
RO
Reset
Description
For TI use only.
Channel synchronization pointer on HS side in 10GKR mode. Required for latency
measurement function. See Latency Measurement function section for more details.
In 10GKR mode, [6:4] reflects 3 MSB’s of 7 bit HS sync rotation. In 1GKX and 10G modes,
indicates channel synchronization state on HS side.
Channel synchronization pointer on HS side. Required for latency measurement function.
See Latency Measurement function section for more details.
In 10GKR mode, reflects 4 LSB’s of 7 bit HS sync rotation.
In 10G and 1GKX modes, reflects 4 bit HS sync rotation.
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