TLK10031 Datasheet, PDF (65/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

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TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
7.5.2.8 LS_SERDES_CONTROL_2 (register: 0x0007) (default: 0xDC04) (device address: 0x1E)
Figure 7-48. LS_SERDES_CONTROL_2 Register
15
RESERVED
R/W
14
13
12
LS_SWING[2:0]
(RXG)
R/W
11
LS_LOS
(RXG)
R/W
10
LS_TX_ENRX
(RXG)
R/W
7
6
5
4
LS_DE[3:0]
(RXG)
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
RESERVED
R/W
2
LS_RX_ENTX
(RXG)
R/W
9
8
LS_TX_RATE [1:0]
(RXG)
R/W
1
0
LS_RX_RATE [1:0]
(RXG)
R/W
Bit
15
14:12
11
Field
RESERVED
LS_SWING[2:0]
(RXG)
LS_LOS
(RXG)
10 LS_TX_ENRX
(RXG)
9:8 LS_TX_RATE [1:0]
(RXG)
7:4 LS_DE[3:0]
(RXG)
3 RESERVED
2 LS_RX_ENTX
(RXG)
1:0 LS_RX_RATE [1:0]
(RXG)
Table 7-26. LS_SERDES_CONTROL_2 Field Description
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Description
For TI use only.
Output swing control on LS Serdes side. (Default 3’b101)
Refer to Table 7-27.
LS Serdes LOS detector control
0 = Disable Loss of signal detection on LS serdes lane inputs
1 = Enable Loss of signal detection on LS serdes lane inputs (Default 1’b1)
LS Serdes enable control on the transmit channel. LS Serdes per lane on transmitter channel
is automatically disabled when PD_TRXx_N is asserted LOW or when register bit 1E.0001 bit
15 is set HIGH. Lanes 3 and 2 are automatically disabled when in 2ln 10G mode on transmit
channel. Lanes 3, 2 and 1 are automatically disabled when in 1ln 10G mode or 1G-KX mode
on transmit channel.
0 = Disables LS serdes lane
1 = Enables LS serdes lane (Default 1’b1)
LS Serdes lane rate settings on transmit channel.
00 = Full rate (Default 2’b00)
01 = Half rate
10 = Quarter rate
11 = Reserved
LS Serdes De-emphasis settings. (Default 4’b0000)
Refer to Table 7-28.
For TI use only.
LS Serdes lane enable control on receive channel. LS Serdes per lane on receiver channel is
automatically disabled when PD_TRXx_N is asserted LOW or when register bit 1E.0001 bit
15 is set HIGH. Lanes 3 and 2 are automatically disabled when in 2ln 10G mode on receive
channel. Lanes 3, 2 and 1 are automatically disabled when in 1ln 10G or 1G-KX mode on
receive channel.
0 = Disables LS serdes lane
1 = Enables LS serdes lane (Default 1’b1)
LS Serdes lane rate settings on receive channel.
00 = Full rate (Default 2’b00)
01 = Half rate
10 = Quarter rate
11 = Reserved
Table 7-27. LSRX Output AC Mode Output Swing Control
LS_SWING[2:0]
000
001
010
011
100
101
110
111
AC MODE
TYPICAL AMPLITUDE (mVdfpp)
190
380
560
710
850
950
1010
1050
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