TLK10031 Datasheet, PDF (26/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
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The TLK10031 provides two pins: PRBSEN and PRBS_PASS, for additional control and monitoring of
PRBS pattern generation and verification. When PRBSEN is asserted high, the internal PRBS generator
and verifier circuits are enabled on both transmit and receive data paths on high speed and low speed
sides. PRBS 2⁷-1 is selected by default, and can be changed through MDIO.
When PRBS test is enabled (PRBSEN=1):
• PRBS_PASS = 1 indicates that PRBS pattern reception is error free.
• PRBS_PASS = 0 indicates that a PRBS error is detected. The side (high speed or low speed), and the
lane (for low speed side) that this signal refers to is chosen through MDIO.
7.3.18 10GBASE-KR Latency
The latency through the TLK10031 in 10GBASE-KR mode is as shown in Figure 7-6. Note that the latency
ranges shown indicate static rather than dynamic latency variance, i.e., the range of possible latencies
when the serial link is initially established. During normal operation, the latency through the device is fixed.
Figure 7-6. 10GBASE-KR Mode Latency Per Block
7.4 Device Functional Modes
The TLK10031 is a versatile high-speed transceiver device that is designed to perform various physical
layer functions in three operating modes: 10GBASE-KR Mode, 1G-KX Mode, and General Purpose (10G)
SERDES Mode. The three modes are described in three separate sections. The device operating mode is
determined by the MODE_SEL and ST pin settings, as well as MDIO register 1E.0001 bit 10.
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