TLK10031 Datasheet, PDF (118/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
7.5.4.9 PCS_TP_SEED_A3 (register = 0x0025) (default = 0x0000) (device address: 0x03)
Figure 7-142. PCS_TP_SEED_A3 Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
RESERVED
PCS_TP_SEED_A[57:48]
(R)
RW
RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
15:10
9:0
Field
RESERVED
PCS_TP_SEED_A[57:48]
(R)
Table 7-124. PCS_TP_SEED_A3 Field Descriptions
Type
RW
RW
Reset
Description
For TI use only. Always reads 0.
Test pattern seed A bits 57-48
7.5.4.10 PCS_TP_SEED_B0 (register = 0x0026) (default = 0x0000) (device address: 0x03)
Figure 7-143. PCS_TP_SEED_B0 Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
PCS_TP_SEED_B[15:0]
(R)
RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
15:0 PCS_TP_SEED_B[15:0]
(R)
Table 7-125. PCS_TP_SEED_B0 Field Descriptions
Type
RW
Reset
Description
Test pattern seed B bits 15-0
7.5.4.11 PCS_TP_SEED_B1 (register = 0x0027) (default = 0x0000) (device address: 0x03)
Figure 7-144. PCS_TP_SEED_B1 Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
PCS_TP_SEED_B[31:16]
(R)
RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
15:0 PCS_TP_SEED_B[31:16]
(R)
Table 7-126. PCS_TP_SEED_B1 Field Descriptions
Type
RW
Reset
Description
Test pattern seed B bits 31-16
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1
0
1
0
1
0
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