TLK10031 Datasheet, PDF (79/146 Pages) Texas Instruments – TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver

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TLK10031
SLLSEL3A – JULY 2015 – REVISED AUGUST 2015
7.5.2.26 DST_CONTROL_2 (register = 0x0018 ) (default = 0x0C20) (device address: 0x1E)
Figure 7-66. DST_CONTROL_2 Register
15
14
13
12
11
10
9
8
DST_DATA_SRC_SEL[1:0]
(RXG)
DST_DATA_SW_MODE[1:0]
(RXG)
RESERVED
RW
RW
RW
7
6
5
4
3
2
1
0
DST_MASK_CYCLES[7:0] (RXG)
RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
15:14
Field
DST_DATA_SRC_SEL[1:0]
(RXG)
13:12 DST_DATA_SW_MODE[1:0]
(RXG)
11:8 RESERVED
7:0 DST_MASK_CYCLES[7:0]
(RXG)
Table 7-47. DST_CONTROL_2 Field Descriptions
Type
RW
RW
RW
RW
Reset
Description
Data selection for transmit data switch source input. Applicable when DST_PIN_SW_EN is
LOW.
00 = Select LS input(Default 2’b00)
01 = Select HS input
10 = Reserved
11 = Reserved
Selects condition to trigger data switch for the selected ON/OFF condition. (Default 2’b00)
OFF condition:
00 = Wait for OFF trigger
01 = Any data
10 = Any data
11 = Wait for OFF trigger
ON condition:
00 = Wait for ON trigger
01 = Wait for ON trigger
10 = Any data
11 = Any data
For TI use only (Default 4’b1100)
Duration of clock cycles that the data-switch output data is masked with the data pattern
selected through DST_STUFF_SEL. (Default 8’b0010_0000)
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