C8051F80X_14 Datasheet, PDF (97/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
17. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the C8051F80x-83x's resources and peripher-
als. The CIP-51 controller core duplicates the SFRs found in a typical 8051 implementation as well as
implementing additional SFRs used to configure and access the sub-systems unique to the C8051F80x-
83x. This allows the addition of new functionality while retaining compatibility with the MCS-51™ instruc-
tion set. Table 17.1 lists the SFRs implemented in the C8051F80x-83x device family.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g., P0, TCON, SCON0, IE, etc.) are bit-
addressable as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied
addresses in the SFR space are reserved for future use. Accessing these areas will have an indeterminate
effect and should be avoided. Refer to the corresponding pages of the data sheet, as indicated in
Table 17.2, for a detailed description of each register.
Table 17.1. Special Function Register (SFR) Memory Map
F8 SPI0CN PCA0L PCA0H PCA0CPL0 PCA0CPH0 P0MAT P0MASK VDM0CN
F0 B
P0MDIN P1MDIN
EIP1
EIP2
PCA0PWM
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2 P1MAT
E0 ACC
XBR0
XBR1
IT01CF
D8 PCA0CN PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2 CRC0IN
P1MASK
EIE1
CRC0DATA
RSTSRC
EIE2
D0 PSW REF0CN CRC0AUTO CRC0CNT P0SKIP P1SKIP SMB0ADM SMB0ADR
C8 TMR2CN REG0CN TMR2RLL TMR2RLH TMR2L TMR2H CRC0CN CRC0FLIP
C0 SMB0CN SMB0CF SMB0DAT ADC0GTL ADC0GTH ADC0LTL ADC0LTH
B8 IP
CS0SS CS0SE ADC0MX ADC0CF ADC0L ADC0H
B0 CS0CN OSCXCN OSCICN OSCICL
HWID
REVID
FLKEY
A8 IE
CLKSEL
CS0DL CS0DH DERVID
A0 P2
98 SCON0
90 P1
SPI0CFG
SBUF0
SPI0CKR
SPI0DAT P0MDOUT P1MDOUT P2MDOUT
CPT0CN CS0MX CPT0MD CS0CF
CS0THL
CPT0MX
CS0THH
88 TCON TMOD
TL0
TL1
TH0
TH1
CKCON PSCTL
80 P0
SP
DPL
DPH
PCON
0(8)
1(9)
2(A)
3(B)
4(C)
5(D)
6(E)
7(F)
Note: SFR Addresses ending in 0x0 or 0x8 are bit-addressable locations, and can be used with bitwise instructions.
Rev. 1.0
97