C8051F80X_14 Datasheet, PDF (8/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
Table 18.1. Interrupt Summary .............................................................................. 104
19. Flash Memory
Table 19.1. Flash Security Summary .................................................................... 115
20. Power Management Modes
21. Reset Sources
22. Oscillators and Clock Selection
23. Port Input/Output
Table 23.1. Port I/O Assignment for Analog Functions ......................................... 141
Table 23.2. Port I/O Assignment for Digital Functions ........................................... 142
Table 23.3. Port I/O Assignment for External Digital Event Capture Functions .... 142
24. Cyclic Redundancy Check Unit (CRC0)
Table 24.1. Example 16-bit CRC Outputs ............................................................. 160
Table 24.2. Example 32-bit CRC Outputs ............................................................. 161
25. Enhanced Serial Peripheral Interface (SPI0)
Table 25.1. SPI Slave Timing Parameters ............................................................ 179
26. SMBus
Table 26.1. SMBus Clock Source Selection .......................................................... 184
Table 26.2. Minimum SDA Setup and Hold Times ................................................ 185
Table 26.3. Sources for Hardware Changes to SMB0CN ..................................... 189
Table 26.4. Hardware Address Recognition Examples (EHACK = 1) ................... 190
Table 26.5. SMBus Status Decoding With Hardware ACK Generation Disabled
(EHACK = 0) ....................................................................................... 197
Table 26.6. SMBus Status Decoding With Hardware ACK Generation Enabled
(EHACK = 1) ....................................................................................... 199
27. UART0
Table 27.1. Timer Settings for Standard Baud Rates
Using The Internal 24.5 MHz Oscillator .............................................. 208
Table 27.2. Timer Settings for Standard Baud Rates
Using an External 22.1184 MHz Oscillator ......................................... 208
28. Timers
29. Programmable Counter Array
Table 29.1. PCA Timebase Input Options ............................................................. 226
Table 29.2. PCA0CPM and PCA0PWM Bit Settings for PCA Capture/Compare
Modules^1,2,3,4,5,6 ................................................................................. 228
Table 29.3. Watchdog Timer Timeout Intervals1 ................................................... 237
30. C2 Interface
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Rev. 1.0