C8051F80X_14 Datasheet, PDF (227/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
29.2. PCA0 Interrupt Sources
Figure 29.3 shows a diagram of the PCA interrupt tree. There are five independent event flags that can be
used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set upon
a 16-bit overflow of the PCA0 counter, an intermediate overflow flag (COVF), which can be set on an over-
flow from the 8th through 15th bit of the PCA0 counter, and the individual flags for each PCA channel
(CCF0, CCF1, and CCF2), which are set according to the operation mode of that module. These event
flags are always set when the trigger condition occurs. Each of these flags can be individually selected to
generate a PCA0 interrupt, using the corresponding interrupt enable flag (ECF for CF, ECOV for COVF,
and ECCFn for each CCFn). PCA0 interrupts must be globally enabled before any individual interrupt
sources are recognized by the processor. PCA0 interrupts are globally enabled by setting the EA bit in the
IE register and the EPCA0 bit in the EIE1 register to logic 1.
(for n = 0 to 2)
PCA0CPMn
PECCMT PE
WC A A A O WC
MO P P T GMC
1 MPN n n n F
6nnn
n
n
PCA Counter/Timer 8-bit
through 15-bit Overflow
PCA Counter/Timer 16-
bit Overflow
PCA Module 0
(CCF0)
PCA0CN
CC
CCC
FR
CCC
FFF
210
PCA0MD
C WW C C C E
I DD PPPC
DTL SSSF
LEC 2 1 0
K
ECCF0
0
1
0
1
PCA Module 1
(CCF1)
ECCF1
0
1
PCA Module 2
(CCF2)
ECCF2
0
1
PCA0PWM
AEC ECCC
RCO A L L L
SOV RSSS
EVF 1EEE
L
6LLL
210
0
1
Set 8 through 15 bit Operation
EPCA0
EA
0
1
Figure 29.3. PCA Interrupt Block Diagram
0 Interrupt
Priority
1
Decoder
Rev. 1.0
227