C8051F80X_14 Datasheet, PDF (77/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
SFR Definition 13.3. CS0DH: Capacitive Sense Data High Byte
Bit
7
6
5
4
3
2
1
0
Name
CS0DH[7:0]
Type
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xAC
Bit
Name
Description
7:0
CS0DH CS0 Data High Byte.
Stores the high byte of the last completed 16-bit Capacitive Sense conversion.
SFR Definition 13.4. CS0DL: Capacitive Sense Data Low Byte
Bit
7
6
5
4
3
2
1
0
Name
CS0DL[7:0]
Type
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xAB
Bit
Name
Description
7:0
CS0DL CS0 Data Low Byte.
Stores the low byte of the last completed 16-bit Capacitive Sense conversion.
Rev. 1.0
77