C8051F80X_14 Datasheet, PDF (35/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

5. QSOP-24 Package Specifications
C8051F80x-83x
Figure 5.1. QSOP-24 Package Drawing
Table 5.1. QSOP-24 Package Dimensions
Dimension Min
Nom
Max
Dimension Min
Nom
Max
A
—
—
1.75
A1
0.10
—
0.25
b
0.20
—
0.30
c
0.10
—
0.25
D
8.65 BSC
E
6.00 BSC
E1
3.90 BSC
e
0.635 BSC
L
0.40
—
1.27
L2
0.25 BSC

0º
—
8º
aaa
0.20
bbb
0.18
ccc
0.10
ddd
0.10
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC outline MO-137, variation AE.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body
Components.
Rev. 1.0
35