C8051F80X_14 Datasheet, PDF (51/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
SFR Definition 8.2. ADC0H: ADC0 Data Word MSB
Bit
7
6
5
4
3
2
1
0
Name
ADC0H[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xBE
Bit Name
Function
7:0 ADC0H[7:0] _{ADC0 Data Word High-Order Bits.}
For AD0LJST = 0: Bits 7–2 will read 000000b. Bits 1–0 are the upper 2 bits of the 10-
bit ADC0 Data Word.
For AD0LJST = 1: Bits 7–0 are the most-significant bits of the 10-bit ADC0 Data
Word.
Note: In 8-bit mode AD0LJST is ignored, and ADC0H holds the 8-bit data word.
SFR Definition 8.3. ADC0L: ADC0 Data Word LSB
Bit
7
6
5
4
3
2
1
0
Name
ADC0L[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xBD
Bit Name
Function
7:0 ADC0L[7:0] _{ADC0 Data Word Low-Order Bits.}
For AD0LJST = 0: Bits 7–0 are the lower 8 bits of the 10-bit Data Word.
For AD0LJST = 1: Bits 7–6 are the lower 2 bits of the 10-bit Data Word. Bits 5–0 will
always read 0.
Note: In 8-bit mode AD0LJST is ignored, and ADC0L will read back 00000000b.
Rev. 1.0
51