C8051F80X_14 Datasheet, PDF (41/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
Table 7.3. Port I/O DC Electrical Characteristics
V_DD = 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified.
Parameters
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage
Current
Conditions
I_OH = –3 mA, Port I/O push-pull
I_OH = –10 µA, Port I/O push-pull
I_OH = –10 mA, Port I/O push-pull
I_OL = 8.5 mA
I_OL = 10 µA
I_OL = 25 mA
Weak Pullup Off
Weak Pullup On, V_IN = 0 V
Min
V_DD – 0.7
V_DD - 0.1
—
—
—
—
0.75 x V_DD
—
–1
—
Typ
—
—
V_DD - 0.8
—
—
1.0
—
—
—
15
Max
—
—
—
0.6
0.1
—
—
0.6
1
50
Units
V
V
V
V
V
V
V
V
µA
µA
Table 7.4. Reset Electrical Characteristics
V_DD = 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max Units
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
I_OL = 8.5 mA,
V_DD = 1.8 V to 3.6 V
RST = 0.0 V
—
—
0.6
V
0.75 x V_DD —
—
—
—
25
—
V
0.3 x V_DD V_DD
50
µA
V_DD POR Ramp Time
V_DD Monitor Threshold (V_RST)
Missing Clock Detector
Timeout
Time from last system clock
rising edge to reset initiation
—
—
1
ms
1.7
1.75
1.8
V
100
500
1000
µs
Reset Time Delay
Delay between release of any
—
—
30
µs
reset source and code
execution at location 0x0000
Minimum RST Low Time to
Generate a System Reset
15
—
—
µs
V_DD Monitor Turn-on Time
V_DD Monitor Supply Current
V_DD = V_RST – 0.1 V
—
50
—
µs
—
20
30
µA
Table 7.5. Internal Voltage Regulator Electrical Characteristics
V_DD = 3.0 V, –40 to +85 °C unless otherwise specified.
Parameter
Conditions
Min Typ Max Units
Input Voltage Range
Bias Current
1.8
—
3.6
V
—
50
65
µA
Rev. 1.0
41