C8051F80X_14 Datasheet, PDF (177/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
SCK*
MISO
T
MCKH
T
MCKL
T
MIS
T
MIH
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 25.8. SPI Master Timing (CKPHA = 0)
SCK*
MISO
T
MCKH
T
MCKL
T
MIS
T
MIH
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 25.9. SPI Master Timing (CKPHA = 1)
Rev. 1.0
177