C8051F80X_14 Datasheet, PDF (214/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
T0M
Pre-scaled Clock
0
SYSCLK
1
0
1
T0
Crossbar
TR0
GATE0
TMOD
GCT TGCT T
A / 11A / 00
T T MM T T MM
E110E010
1
0
TR1
TH0
(8 bits)
TL0
(8 bits)
INT0
IN0PL _XOR
Figure 28.3. T0 Mode 3 Block Diagram
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Interrupt
Interrupt
214
Rev. 1.0