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| C8051F80X_14 Datasheet, PDF (56/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family | |||
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C8051F80x-83x
8.5. ADC0 Analog Multiplexer
ADC0 on the C8051F800/1/2/3/4/5, C8051F812/3/4/5/6/7, C8051F824/5/6, and C8051F830/1/2 uses an
analog input multiplexer to select the positive input to the ADC. Any of the following may be selected as the
positive input: Port 0 or Port 1 I/O pins, the on-chip temperature sensor, or the positive power supply (VDD).
The ADC0 input channel is selected in the ADC0MX register described in SFR Definition 8.9.
ADC0MX
P0.0
Note: P1.4-P1.7
are not available
on the 16-pin
packages.
P1.7
AMUX
ADC0
Temp
Sensor
VREG Output
VDD
GND
Figure 8.6. ADC0 Multiplexer Block Diagram
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be config-
ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog
input, set the corresponding bit in register PnMDIN to 0. To force the Crossbar to skip a Port pin, set the
corresponding bit in register PnSKIP to 1. See Section â23. Port Input/Outputâ on page 138 for more Port
I/O configuration details.
56
Rev. 1.0
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