C8051F80X_14 Datasheet, PDF (144/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
Port
P0
P1
Pin Number 0 1 2 3 4 5 6 7 0 1 2 3 4¹ 5¹ 6¹ 7¹ 0
Special
Function
Signals
TX0
RX0
SCK
MISO
MOSI
NSS²
SDA
SCL
CP0
CP0A
SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
Pin Skip ^{0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0}
Settings
P0SKIP
P1SKIP
Pins P0.0-P1.7¹ are capable of being assigned to crossbar peripherals.
The crossbar peripherals are assigned in priority order from top to bottom,
according to this diagram.
These boxes represent Port pins which can potentially be assigned to
a peripheral.
Special Function Signals are not assigned by the crossbar. When
these signals are enabled, the Crossbar should be manually configured to
skip the corresponding port pins.
Pins can be “skipped” by setting the corresponding bit in PnSKIP to ‘1’.
Notes:
1. P1.4-P1.7 are not available on 16-pin packages.
2. NSS is only pinned out when the SPI is in 4-wire mode.
Figure 23.4. Priority Crossbar Decoder Potential Pin Assignments
144
Rev. 1.0