C8051F80X_14 Datasheet, PDF (100/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
Table 17.2. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
P1MAT
P1MDIN
P1MDOUT
P1SKIP
P2
Address
Description
0xED P1 Match
0xF2 Port 1 Input Mode Configuration
0xA5 Port 1 Output Mode Configuration
0xD5 Port 1 Skip
0xA0 Port 2 Latch
P2MDOUT
PCA0CN
PCA0CPH0
PCA0CPH1
PCA0CPH2
PCA0CPL0
0xA6
0xD8
0xFC
0xEA
0xEC
0xFB
Port 2 Output Mode Configuration
PCA Control
PCA Capture 0 High
PCA Capture 1 High
PCA Capture 2 High
PCA Capture 0 Low
PCA0CPL1
PCA0CPL2
PCA0CPM0
PCA0CPM1
PCA0CPM2
PCA0H
PCA0L
PCA0MD
PCA0PWM
PCON
PSCTL
PSW
REF0CN
REG0CN
REVID
RSTSRC
0xE9
0xEB
0xDA
0xDB
0xDC
0xFA
0xF9
0xD9
0xF7
0x87
0x8F
0xD0
0xD1
0xC9
0xB6
0xEF
PCA Capture 1 Low
PCA Capture 2 Low
PCA Module 0 Mode Register
PCA Module 1 Mode Register
PCA Module 2 Mode Register
PCA Counter High
PCA Counter Low
PCA Mode
PCA PWM Configuration
Power Control
Program Store R/W Control
Program Status Word
Voltage Reference Control
Voltage Regulator Control
Revision ID
Reset Source Configuration/Status
Page
152
156
156
157
157
158
238
243
243
243
243
243
243
241
241
241
242
242
239
240
122
118
91
62
64
96
128
100
Rev. 1.0